One hot selector, G_LEN inputs and single output. G_SIZE is width of the data vector. G_LEN is the number of vectors to select.
process(AI,SEL)
begin
AO <= (others => '0');
LP1 : for idn in 0 to G_LEN - 1 loop
if SEL(idn) = '1' then
AO <= AI(idn);
exit LP1;
end if;
end loop l1 ;
end process;
begin
AO <= (others => '0');
LP1 : for idn in 0 to G_LEN - 1 loop
if SEL(idn) = '1' then
AO <= AI(idn);
exit LP1;
end if;
end loop l1 ;
end process;
| Technology | Architecture G_SIZE x G_LEN | Resources LUT as Logic | Path Delay [ns] |
| Virtex-7 vx690 | 8 x 16 8 x 64 32 x 16 32 x 64 | 76 288 293 1090 | 1.613 2.121 1.680 2.610 |
| Virtex Ultrascale vu440 | 8 x 16 8 x 64 32 x 16 32 x 64 | 76 287 291 1091 | 1.177 1.688 1.261 2.267 |
| Virtex UltrascalePlus vu9p | 8 x 16 8 x 64 32 x 16 32 x 64 | 77 288 292 1085 | 0.825 1.297 0.951 1.512 |
One hot selector, G_LEN inputs and single output with no exit after select. G_SIZE is width of the data vector. G_LEN is the number of vectors to select.
process(AI,SEL)
begin
AO <= (others => '0');
for i in 0 to G_LEN - 1 loop
if SEL(i) = '1' then
AO <= AI(i);
end if;
end loop;
end process;
begin
AO <= (others => '0');
for i in 0 to G_LEN - 1 loop
if SEL(i) = '1' then
AO <= AI(i);
end if;
end loop;
end process;
| Technology | Architecture G_SIZE x G_LEN | Resources LUT as Logic | Path Delay [ns] |
| Virtex-7 vx690 | 8 x 16 8 x 64 32 x 16 32 x 64 | 76 292 292 1096 | 1.603 2.257 1.659 2.527 |
| Virtex Ultrascale vu440 | 8 x 16 8 x 64 32 x 16 32 x 64 | 76 290 291 1093 | 1.166 1.708 1.281 2.254 |
| Virtex UltrascalePlus vu9p | 8 x 16 8 x 64 32 x 16 32 x 64 | 76 288 291 1088 | 0.807 1.261 1.000 1.507 |
One hot selector, G_LEN many inputs and single output. Selector is realized in dedicated function with conversion from one hot to binary.
function onehottobin (a : std_logic_vector) return integer is
variable tmp : integer range 0 to a'high;
begin
tmp := 0;
l1: for i in 0 to a'high loop
tmp := i;
if a(i) = '1' then
exit l1;
end if;
end loop l1;
return tmp;
end function onehottobin;
begin
AO <= AI(onehottobin(SEL));
end test;
variable tmp : integer range 0 to a'high;
begin
tmp := 0;
l1: for i in 0 to a'high loop
tmp := i;
if a(i) = '1' then
exit l1;
end if;
end loop l1;
return tmp;
end function onehottobin;
begin
AO <= AI(onehottobin(SEL));
end test;
| Technology | Architecture G_SIZE x G_LEN | Resources LUT as Logic | Path Delay [ns] |
| Virtex-7 vx690 | 8 x 16 8 x 64 32 x 16 32 x 64 | 90 244 174 699 | 2.018 3.969 1.919 4.204 |
| Virtex Ultrascale vu440 | 8 x 16 8 x 64 32 x 16 32 x 64 | 90 260 172 665 | 1.555 2.970 1.603 3.603 |
| Virtex UltrascalePlus vu9p | 8 x 16 8 x 64 32 x 16 32 x 64 | 79 230 170 666 | 1.056 2.337 1.100 2.433 |
Binary SEL selector input, many inputs and single output. Selector chooses an input.
SEL : in std_logic_vector(integer(ceil(log2(real(G_LEN))))-1 downto 0);
...
AO <= AI(to_integer(unsigned(SEL)));
...
AO <= AI(to_integer(unsigned(SEL)));
| Technology | Architecture G_SIZE x G_LEN | Resources LUT as Logic | Path Delay [ns] |
| Virtex-7 vx690 | 8 x 16 8 x 64 32 x 16 32 x 64 | 40 144 160 576 | 0.928 1.814 1.113 1.694 |
| Virtex Ultrascale vu440 | 8 x 16 8 x 64 32 x 16 32 x 64 | 39 143 160 576 | 0.808 1.295 0.877 1.368 |
| Virtex UltrascalePlus vu9p | 8 x 16 8 x 64 32 x 16 32 x 64 | 40 143 160 575 | 0.747 0.966 0.762 1.061 |
The results were taken for XilinxR Vivado 2019.2.1